The present disclosure relates to the protection of integrated circuits and more specifically, to preventing metal lines in integrated circuits from current pulse damage.
As technology progresses, semiconductor product device features are becoming smaller and the density of electronic devices per area is increasing. This increases the current density and total power such that the smaller wires and interconnections become more vulnerable to damage caused by current pulses. In addition, high performance electronic devices require the use of higher current pulses during operation. Current pulses cause local heating of metal lines within the electronic devices and their effects on local temperatures of these metal lines have a significant impact on a circuit's reliability. Therefore, damage caused by peak current pulses must be considered when designing devices to ensure its integrity during normal operation.
Present tools are capable of performing design simulations to check for damage caused by the currents flowing during circuit design. However these simulations are limited to currents that have high activity factors and that are highly repetitive. A technique for designing circuits operating with both high and low activity factors is needed in order to provide protection from peak current pulses.